;----------------------------------------------------------------------------- ; Input: ; a1:a0 - 14 bit dividend (a0 - lower byte) ; b1:b0 - 15 bit divisor in 7Q8 format (b1 is integer, b0 is ; fractional) ; Output: ; c1:c0 - 15 bit quotient in 7Q8 format ; ; Size: 27 words ; Time: 3+3+3+15*(5+8+6)-2+3=295 instruction cycles ; ; March 13, 2001 by Nikolai Golovchenko ; March 14, 2001 optimized by Scott Dattalo ;----------------------------------------------------------------------------- div_uint14_fxp7q8_fxp7q8 ;left align the dividend ; (shift accumulator left 1 bit to get the first result bit weight ; equal to 128) clc rl a0 rl a1 ;carry is cleared here ;initialize registers clr c0 ;clear result - it will be used clr c1 ;to shift zeroes to dividend setb c0.1 ;15 iterations div_loop rl a0 ;shift out next bit of dividend rl a1 ;to remainder mov W, b0 ;load w with lower divisor byte snc ;if remainder positive - subtract, jmp div_add ;if negative - add ;subract sub a0, W mov W, b1 sc movsz W, ++b1 sub a1, W jmp div_next div_add ;add add a0, W mov W, b1 snc movsz W, ++b1 add a1, W div_next ;here carry has a new result bit rl c0 ;shift in next result bit rl c1 skpc jmp div_loop retp
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