Avoiding Noise

General tips for avoiding noise

• Avoiding noise in a PCB
  • One solid unsplit ground plane
  • Ground loops
  • Other ways
• Avoiding noise in a wire-wrap circuit
  (yes, we know no one wire wraps anymore, but the lessons learned under those less than ideal conditions are worth remembering)
• Using noise to your benifit

General tips for avoiding noise

Given a choice between your chips not agreeing on where ground is and on not agreeing on the supply voltage, its better that they agree on ground. That can help a bit with noise problems. <GRIN>

• For the ground connections, use a star pattern or ground plane. (It would be nice to do this for the power connections also). See below for details.
• Add Ferrite Beads to long cables carrying high frequency signals
• Electronic Construction -- Tips, Tricks, Gens, Traps, and Snares

Avoiding noise in a PCB

one solid unsplit ground plane

There seems to be a bit of controversy between " power isolation " vs others who say "Don't split the ground plane. Don't split the power plane either, unless it actually needs to be different voltages. PCBs@"

Bryan in 1998 made some good recommendations, including "Make sure that you have a good ground plane under anything that uses RF frequencies especially the micro controller and I/O lines. ... Some people use a split ground plane but I have had disastrous results using a split ground plane." -- "RF Noise" thread http://massmind.org/techref/postbot.asp?by=thread&id=RF+Noise

"Do not split the ground plane. Use one solid plane under both analog and digital sections of the board." -- Ott, in article "partitioning and layout of a mixed signal pcb" article by Henry W. Ott (EMI consultant) in _printed circuit design_ magazine (june 2001) http://www.hottconsultants.com/techtips/split-gnd-plane.html http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf /* was http://www.pcdmag.com/db_area/archives/2001/06/0106_1.html */

in it he basically makes the case that split planes are generally a bad thing

their best use he says is to correct a badly laid out board after the fact and also in some cases they are needed for safety isolation

but as to localizing noise (preventing polution of low level signals) and minimizing EMI nothing beats a *properly laid out* (i.e. 'routed/placed') board with a single ground plane possessing a single net

-- recc. Dennis Saputelli 2001-06-09

"Nothing is more important to the system design of a circuit than having a solid and complete power system. ... Design the ground system to include as many parallel pathways to ground as possible. ... ground planes are optimal ..." -- Mark Glenewinkel. "Motorola Semiconductor application note AN1259: System design and layout techniques for noise reduction in MCU-base systems". 1995.

US Patent 6023202 "Ground return for high speed digital signals that are capacitively coupled across a DC-isolated interface" by Hill, Gregory A. (02/13/1998) describes the best way to capacitively couple high-speed digital signals (in general) across a galvanic isolation, and (specifically) how it applies to FireWire. "... application of the invention produces improved signal integrity, reduced generation of electromagnetic emissions, and reduced susceptibility to electromagnetic interference."

"Analog-to-Digital Converter Grounding Practices Affect System Performance" http://www.ti.com/litv/pdf/sbaa052 describes how "a single ground plane" works best. Attempting to make a "split grounds connected together at the ADC" gave worse DLE.

ground loop

"Ground loops" are a badly misunderstood part of electronics.

• http://www.midcoast.com.au/~paulb/faq_loop.html "The evils of current loops." by Paul B. Webster points out: a complete "loop ground" around the outside of the PCB is a good thing; a complete "loop" of connection around a shield can is good; coax cable has a complete "loop" of braided shielding, and that is also good.
• The "Linear Circuit Design Handbook" by Hank Zumbahlen, Analog Devices Inc. 2008 p. 835-837 recommends using a "guard ring" around op-amp inputs. (preview)
• http://www.planetanalog.com/columns/guest/showArticle.jhtml?articleID=20800244 "To guard (band)... or not to guard? That is the question" by Bill Klein, Texas Instruments, Burr-Brown Products Group, Tucson, AZ., 2008
• "Op Amp Applications Handbook" by Walter G. Jung, 2004, p. 261-265, also recommends using a "guard ring" around op-amp inputs. (preview)
• http://www.physicsforums.com/showthread.php?t=212030 Some discussion of guard rings / guard traces: Physics forums: "Guard rings for ic input"

Many op-amp data sheets recommend guard rings, such as

• Analog Devices AD711 p. 9 http://www.duke.edu/~hpgavin/ce281/AD711.pdf
• Analog Devices AD712 p. 9 http://www.chinaelite.com/pdf/288953399AD712_e.pdf
• National Semiconductor LMC6042 p. 10 http://symmetrongroup.ru/extra/ns/LMC6042.pdf
• Texas Instruments Burr Brown OPA129 p. 7 http://yorkebrown.net/balloon/docs/OPA129.pdf
• Analog Devices AD645 p. 7, 8 http://www.ing.unlp.edu.ar/comunica/doc/ad645.pdf
• Analog Devices AD795 p. 9, 13, 14 http://www.datasheetcatalog.org/datasheet/analogdevices/411552444AD795_b.pdf

other ways of avoiding noise in a PCB

• Micro controller interfacing to analog sensors Covers ADC count conversion to real units and how noise can be compenstated for (and even become a benifit!) by using averaging.
• "Noise in PCB Design: A Guide for PCB Designers" by Bill Chambers, PE has many PCB design tips for reducing noise
• http://en.wikibooks.org/wiki/Acoustics/Noise_from_Cooling_Fans "Wikibooks: Acoustic Noise from Cooling Fans"
• "EMC Design Considerations" http://atmel.com/dyn/resources/prod_documents/DOC1619.PDF has many good tips. One of the more counter-intuitive tips:

• "When... four or more layers are used ... one plane is used as a ground plane... one layer as a power plane ... These two planes should then be placed next to each other in the middle of the board, to reduce power supply impedance and loop area. It is not a good idea to place the power and ground planes as the outer layers to act as shields. It does not work as intended, as high currents are running in the ground plane. A shield layer would have to be a second pair of ground layers."

• When a product has a 10 MHz clock, and it fails FCC testing because it emits too much 30 MHz noise, that does not mean that the radio waves are being directly emitted by the clock wires. Some people use a tiny antenna ("magnetic field probe") and wave it over the board to figure out exactly which wires are emitting the 30 MHz noise. See "Signal and Noise Measurement Techniques Using Magnetic Field Probes" by D. C. Smith Consultants http://emcesd.com/.

Avoiding noise in wire-wrap circuits

Follow these steps to eliminate noise.

• Loop around the posts then solder BIG FAT SOLID CORE wire or traces for each chip directly -- from ONE central grounding post or connection -- to each chips ground pin. This is the star pattern often referred to. Or use a ground plane board (overrated in my and Chris Eddys opinions). On a big board, use a tree pattern of stars connected to stars. I usually cheat and run a bare copper rod down one side of the board and then solder the ground runs along that down to each chip. More like most PCBs get layed out. It works.
  
• Use the same star pattern, but with standard wire wrap wire to connect all the Vcc's. This provides a slight resistance that prevents one chip from dragging down the supply for the other chips. Place the supply post in the center of the board to minimize the differences in distance traveled by each wire. This prevents standing waves from developing.
  
• DO NOT SKIP THIS STEP. Solder in decoupling caps with the shortest possible lead length between each chips Gnd and Vcc. Use ceramic NOT electrolytic. If there are two Vdd pins, you need to put bypass caps on BOTH pins. Peter Cousens says:

  A trick I use on RF boards is to have non plated through holes included for small decoupling caps of around 100pf. I put surface mount caps (805) through the hole and solder it on the top and bottom, one of which will be the ground plane.

  The values aren't too critical but bigger is not better. You want the caps to absorb well at the third harmonic of the clock. Russell McMahon says:

  the ARRL handbook gives these figures for series resonance (optimum bypassing) for disk ceramics with total lead lengths of 0.5 inch.

  Cap uF  Freq MHz
  0.01      15
  0.0047    22
  0.002     38
  0.001     55
  0.0005    80
  0.0001    165
  

  You can think of the setup at this point as an irrigation system with level ground and hoses from a big central supply bucket (the power supply cap) to a bucket (decoupleing cap) next to each plant (chip) and a valve on the bucket (the transisters in the chip) that allows water to flow when needed. Draining one bucket won't effect the levels in the others and the force of the water released (supply voltage) will not vary (much) with brief use even if the valve is turned all the way on.
  

• Insert a small resistance in series with each very high speed signal produced by the chips. I always leave a pad for an SMD resister at each pin of a high frequency signal source when I make a PCB. I just bridge the pad with a fine trace (which acts as a small resistor) and if noise becomes a problem, I slice the trace and install a larger resistance. That is reason number 999 for adding resistances to io pins BTW. Think of the resistance as a way of preventing the water valve from being opened all the way. But won't that mess up the signal? delay its propagation? reduce its level? Well, see, even in digital electronics, signals are analog. Its a matter of reducing and delaying a signal A LITTLE in order to decrease noise A LOT. The signal path acts as a (very small) capacitor and the extra (very small) resistor helps to convert the square wave of the original signal (with infinite harmonics) into a semi-sin wave (with no harmonics). Just ask the guys who designed the RS-232 spec. Switching speed is an evil thing.
  See "Don't "despike" your signal lines, add a resistor instead."
• Use the slowest logic family that will handle your requirements. Currently, that means avoiding ACT or F type chips unless you really need to work at 125Mhz.
  
• Don't use relays or mechanical switches to control large power systems. Use power transistors, etc...
   
• Separate the physical placement and power supplies for digital and analog (and fast and slow) parts of the board. Gennette Bruce says:

  Here is a simple idea that works really well to isolate noise generating sections of a circuit from sections that need clean power - it uses just 3 diodes and 1 extra capacitor. In the common leg of a 3 terminal regulator you add a diode that raises the regulator's output voltage by the drop across the diode. You then fit 2 identical diodes to the output from the regulator to drop the voltage back down to where it would have been. Separate smoothing capacitors are then fitted to the 2 separated outputs.

Books:

• High Speed Digital Design: A Handbook of Black Magic by Howard Johnson and Martin Graham

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