Components@
Sockets, Footprints, package
types
Hardware - Emulation#Logic Simulators
There was an interesting interim period [in electronics design, especially video games] when they would use EPROMS - i.e. a microprocessor support chip - in non-micro applications. For example, they would often use them to store those jazzy lighting sequences for the front panel. The EPROM was built into the TTL/CMOS circuitry, rather than sitting on an address and data bus.
The EPROMS where used to simulate complex logic, just as an FPGA or GA can be used today
I've used EPROMS (and fuse link PROMS, remember them :-)) as logic replacement devices on occasion in the dim dark past. A VERY rapid state machine can be made with a package of D flip flops and an EPROM. Faster than many uPs for a limited task. An excellent example of such a beast (used a fuse link prom I think) was the Apple 2 floppy disk controller - The IWM - stood for Integrated Woz Machine (designed by Steve Wozniak) and used a state machine and no uP. Very very simple logic - much cheaper than the state of the art then and for some time which was the eg (ugh) WD1771 FDC. I have seen EPROM used in such designs occasionally in more recent times - EA mag I think used one as a divider to convert period to frequency in I think a car computer. Also useable for eg display decoders.
Wojciech Zabolotny says:
...it should be possible to prepare the project with a HDL which does not depend on the particular EPLD family (Verilog of VHDL). Now i see the following possibility:
- Prepare & test the design with Verilog, using the v2k (http://www.v-ms.com/) or ver (http://daggit.pagecreator.com/ver/ver.html) or Icarus Verilog (http://www.icarus.com/eda/verilog/index.html)
- Translate the tested design into ABEL (AFAIK such functionality is available in the "ver" package)
- Compile the ABEL source with the free version of [Lattis] ispDesignExpert (well, it is not Open Source :-( ).
- Download the obtained JEDEC file into the hardware. [Ed: See http://www.teleport.com/~thandley/Wilbure.htm#ispprog]
See also:
You think because you understand _one_ you must understand two. Because one and one make _two_. But you must also understand _and_. --Sufi Sage
Interested: +
file: /Techref/logics.htm, 8KB, , updated: 2018/12/25 23:26, local time: 2024/12/22 21:35,
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